The present disclosure relates to semiconductor circuit topology, and more specifically, to a dual mode operation having power saving and active modes in a stacked circuit topology.
In a semiconductor circuit that is rarely switching, leakage power must be addressed. Stacking PFET (p-type field effect transistor) or NFET (n-type field effect transistor) devices in series leads to a significant reduction in leakage power when these devices are in a standby state. However, for the circuit to maintain the same effective drive strength, the size of the devices in the stack must be increased which results in an increased load of the critical path. In critical paths, an increase in load can severely degrade performance as high performance devices must be capable of efficiently switching states with minimal delay.